1. Field of the invention
This invention relates to a light-emitting diode and a method for making same, and also to an integrated light-emitting diode and a method for making same. The present invention also relates to a method for growing a nitride-based III-IV group compound semiconductor, and a light source cell unit, a light-emitting diode backlight, a light-emitting diode display and an electronic device using such a light-emitting diode as mentioned above. More particularly, the present invention relates to a light-emitting diode using a nitride-based III-V group compound semiconductor and a variety of devices or units using the light-emitting diode.
2. Description of Related Art
In case where a GaN semiconductor is epitaxially grown on a different type of substrate such as a sapphire substrate, crystal defects, particularly, threading dislocations, occur in high density owing to a great difference between lattice constants or thermal expansion coefficients thereof.
To avoid this, a dislocation density reducing technique using selective lateral growth has been hitherto widely used. According to this technique, a GaN semiconductor is epitaxially grown on a sapphire substrate or the like, after which the substrate is removed from a crystal growing apparatus. A growth mask made of a SiO2 film or the like is formed over the GaN semiconductor layer, followed by returning the substrate to the crystal growing apparatus wherein a GaN semiconductor is again epitaxially grown by use of the growth mask.
Although this technique ensures reduction of a dislocation density in the upper GaN semiconductor layer, two cycles of the epitaxially growing cycles are needed, resulting in an increased cost.
To cope with this, there has been proposed a method wherein a dissimilar substrate is beforehand processed to provide a patterned indented surface, and a GaN semiconductor is epitaxially grown on the thus processed substrate (see, for example, Report of Mitsubishi Cable Industries, LTD., No. 98, October, 2001, entitled “Developments of High-power UV LED Using A LEPS Technique” and Japanese Patent Laid-open Nos. 2004-6931 and 2004-6937). This method is schematically shown in FIGS. 36A to 36C. As shown in FIG. 36A, a c-sapphire substrate 101 is processed to provide a patterned indented surface on one main surface thereof. Reference numeral 101a indicates a recessed portion and reference numeral 101b indicates a protruded portion. These recessed portions 101a and protruded portions 101b extend along the <1-100> direction of the sapphire substrate. Next, a GaN semiconductor 102 is grown on the sapphire substrate 101, for example, through the steps of FIGS. 36B and 36C. In FIG. 36C, dotted lines indicate a growth interface on the way of growth. It is characteristic of this method that as shown in FIG. 36C, for example, a space 103 is formed between the sapphire substrate 101 and the GaN semiconductor layer 102 in each recessed portion 101a. FIG. 37 schematically shows a crystal defect distribution in the GaN semiconductor layer 102 grown according to this method. As shown in FIG. 37, threading dislocations 104 occur at a portion of the GaN semiconductor layer 102 above each protruded portion 101b in a direction vertical to an interface with an upper face of the protruded portion 101b to form a defect density region 105. On the other hand, a portion located above the recessed portion 101a and between adjacent high defect density regions 105 becomes a low defect density region 106.
It will be noted that in FIG. 36C, the buried form of the GaN semiconductor layer 102 beneath the space 103 formed within the recess 101a of the sapphire substrate 101 is rectangular in shape. This buried form may be triangular in some case. In this case, the GaN semiconductor layer 102 buried inside the recessed portion 101a contacts with the GaN semiconductor layer 102 grown laterally from the protruded portion 101b thereby forming a space, like the case of the rectangular form.
For reference, there is shown, in FIGS. 38A to 38D, how a GaN semiconductor layer 102 is grown in case where the direction of extension of the recessed portions 101a and the protruded portions 101b is a <11-20> direction intersecting at right angles with a <1-100> direction of the sapphire substrate 101.
FIGS. 39A to 39F schematically show another growing method in related art, different from the above-mentioned one (see, for example, Japanese Patent Laid-open No. 2003-318441). As shown in FIG. 39A, using a sapphire substrate 101 processed to have a patterned indented surface, a GaN semiconductor layer 102 is grown on the substrate through the steps shown in FIGS. 39B to 39F. It is stated that according to this method, the GaN semiconductor layer 102 is grown without forming a space between the sapphire substrate 101 and the GaN semiconductor layer 102.